The most commonly used voltage regulator design is based on the sync-buck topology, and the output power switches are generally double-Diffused Metal Oxide Semiconductor Field-Effect Transistors, or DMOS FETs. The sync-buck circuit operation is known to require a short “dead time” to avoid the shoot through between upper and lower DMOS FETs to prevent short-circuiting the input power supply (VIN) to ground if both DMOS FETs are turned on simultaneously. During this dead time, body diode conduction occurs. Body diode conduction leads to substantial power loss due to a relatively high-voltage drop across the P-N junction (when compared with the MOSFET voltage drop) and because of the reverse recovery loss associated with the stored charge.
Adaptive dead time control is known. For example, in adaptive dead time control, a gate threshold voltage of a first power MOSFET is monitored to make sure that it is off before a gate drive signal of a second power MOSFET is allowed to go high. However, the gate threshold voltage for different MOSFETs is different, and the gate threshold voltage levels for a given MOSFET change according to the operational temperature. For example, the gate threshold voltage can change from 1.6V at 0° C. to 1.16V at 100° C. To avoid the short-through issue under all operation conditions, the gate threshold voltage under the worst case has to also be considered, resulting in an even longer dead time for the body diode conduction under normal operational conditions. Accordingly, there is a need for improvements in threshold voltage monitoring and control in synchronous power converters.